The present invention relates to an antilock brake control system for preventing the locked condition of each wheel during brake operation, and in particular to an antilock brake control system having a judging means for checking whether a microprocessor is in normal operation or not.
A conventional antilock brake control system is disclosed, for example, in Japanese Patent Kokai 1-246642 published in 1989 without examination.
The conventional control system has a structure shown in FIG. 5. That is to say, a microprocessor 1 includes an output port PO from which a pumping signal in the form of a pulse signal with a cycle is to be fed to a monitoring circuit 2 which is in the form of an IC and when the pumping signal becomes abnormal, the monitoring circuit 2 begins to provide a set signal to a reset terminal PR of the microprocessor 1. In addition, the pumping signal and the reset signal from the monitoring circuit 2 are to be inputted to a set reset flip-flop circuit 5 via an AND-circuit 3 and a NOT-circuit 4 respectively and an abnormal operation of the microprocessor 1 is prevented in such a manner that the power supply to the microprocessor 1 is terminated by turning off a power switching circuit 7 after an elapse of time since the input of the reset signal or the power supply switching circuit 7 is turned off.
However, in the foregoing conventional system, if the operation of the microprocessor 1 occurs after the failure or malfunction of the monitoring circuit 2 and/or the power supply switching circuit 7 while the microprocessor 1 is being supplied with the electric power, such abnormal operation of the microprocessor 1 can't be detected. Thus, as a result the microprocessor 1 continues to issue a signal which indicates an increase of the brake fluid pressure to a solenoid valve, resulting in an unexpected locked condition of each wheel or continues to issue a signal indicating a decrease of the brake fluid pressure, whereby the brake operation can't be established.
At this stage, in the conventional device shown in FIG. 5, even if the microprocessor 1 tries to check whether the monitoring circuit 2 and the power supply switching circuit 7 can operate normally or not by issuing abnormal signals thereto, the check is in vain or is no use. The reason is that the microprocessor 1 is turned off when the monitoring circuit 2 and the power supply switching circuit 7 are operating normally.